1.General descriptionThe UJA1169 is a mini high-speed CAN System Basis Chip (SBC) containing anISO 11898-2:201x (upcoming merged ISO 11898-2/5/6) compliant HS-CAN transceiverand an integrated 5 V or 3.3 V 250 mA scalable supply (V1) for a microcontroller and/orother loads. It also features a watchdog and a Serial Peripheral Interface (SPI). TheUJA1169 can be operated in very low-current Standby and Sleep modes with bus andlocal wake-up capability.The UJA1169 comes in six variants. The UJA1169TK, UJA1169TK/F, UJA1169TK/X andUJA1169TK/X/F contain a 5 V regulator (V1). V1 is a 3.3 V regulator in the UJA1169TK/3and the UJA1169TK/F/3.The UJA1169TK, UJA1169TK/F, UJA1169TK/3 and UJA1169TK/F/3 variants feature asecond on-board 5 V regulator (V2) that supplies the internal CAN transceiver and canalso be used to supply additional on-board hardware.The UJA1169TK/X and UJA1169TK/X/F are equipped with a 5 V supply (VEXT) foroff-board components. VEXT is short-circuit proof to the battery, ground and negativevoltages. The integrated CAN transceiver is supplied internally via V1, in parallel with themicrocontroller.The UJA1169xx/F variants support ISO 11898-6:2013 and ISO 11898-2:201x compliantCAN partial networking with a selective wake-up function incorporating CAN FD-passive.CAN FD-passive is a feature that allows CAN FD bus traffic to be ignored inSleep/Standby mode. CAN FD-passive partial networking is the perfect fit for networksthat support both CAN FD and classic CAN communications. It allows normal CANcontrollers that do not need to communicate CAN FD messages to remain in partialnetworking Sleep/Standby mode during CAN FD communication without generating buserrors.The UJA1169 implements the standard CAN physical layer as defined in the currentISO11898 standard (-2:2003, -5:2007, -6:2013). Pending the release of the upcomingversion of ISO11898-2:201x including CAN FD, additional timing parameters defining loopdelay symmetry are included. This implementation enables reliable communication in theCAN FD fast phase at data rates up to 2 Mbit/s.A dedicated LIMP output pin is provided to flag system failures.A number of configuration settings are stored in non-volatile memory. This arrangementmakes it possible to configure the power-on and limp-home behavior of the UJA1169 tomeet the requirements of different applications.UJA1169Mini high-speed CAN system basis chipRev. 1 — 4 February 2016Product data sheet
