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UJA1169ATK/F/3

UJA1169ATK/F/3

NXP
UJA1169ATK/F/3
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1. General descriptionThe UJA1169A is a mini high-speed CAN System Basis Chip (SBC) containing anISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant HS-CAN transceiverincluding CAN FD up to 5 Mbit/s and an integrated 5 V or 3.3 V 250 mA scalable supply(V1) for a microcontroller and/or other loads. It also features a watchdog and a SerialPeripheral Interface (SPI). The UJA1169A can be operated in very low-current Standbyand Sleep modes with bus and local wake-up capability. The microcontroller supply isswitched off in Sleep mode.The UJA1169A comes in six variants. The UJA1169ATK, UJA1169ATK/F, UJA1169ATK/Xand UJA1169ATK/X/F contain a 5 V regulator (V1). V1 is a 3.3 V regulator in theUJA1169ATK/3 and the UJA1169ATK/F/3.The UJA1169ATK, UJA1169ATK/F, UJA1169ATK/3 and UJA1169ATK/F/3 variantsfeature a second on-board 5 V regulator (V2) that supplies the internal CAN transceiverand can also be used to supply additional on-board hardware.The UJA1169ATK/X and UJA1169ATK/X/F are equipped with a 5 V supply (VEXT) foroff-board components. VEXT is short-circuit proof to the battery, ground and negativevoltages. The integrated CAN transceiver is supplied internally via V1, in parallel with themicrocontroller.The UJA1169Axx/F variants support ISO 11898-2:2016 compliant CAN partial networkingwith a selective wake-up function incorporating CAN FD-passive. CAN FD-passive is afeature that allows CAN FD bus traffic to be ignored in Sleep/Standby mode. CANFD-passive partial networking is the perfect fit for networks that support both CAN FD andclassic CAN communications. It allows normal CAN controllers that do not need tocommunicate CAN FD messages to remain in partial networking Sleep/Standby modeduring CAN FD communication without generating bus errors.The UJA1169A implements the standard CAN physical layer as defined inISO 11898-2:2016. This implementation enables reliable communication in the CAN FDfast phase at data rates up to 5 Mbit/s.A dedicated LIMP output pin is provided to flag system failures.A number of configuration settings are stored in non-volatile memory. This arrangementmakes it possible to configure the power-on and limp-home behavior of the UJA1169A tomeet the requirements of different applications.UJA1169AMini high-speed CAN system basis chipRev. 1 — 12 May 2020Product data sheet